MAX5950ETJ+【PDF 22/28 页】IC PWM CTRL HOT-SW 12V 32TQFN-EP

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12V PWM Controller with Hot-Swap

22 ______________________________________________________________________________________

PC Board Layout Guidelines

Use the following guidelines to layout the switching

voltage regulator:

1) Place the PWM_IN and DREG bypass capacitors

close to the MAX5950 PGND pin. Place the REG

bypass capacitor close to the AGND pin.

2) Minimize the area and length of the high-current

loops from the input capacitor, upper switching

MOSFET, inductor, and output capacitor back to

the input capacitor negative terminal.

3) Keep short the current loop formed by the lower

switching MOSFET, inductor, and output capacitor.

4) Keep AGND and PGND isolated and connect them

at one single point close to the negative terminal of

the input filter capacitor.

5) Run current-sense lines CS+ and CS- close to each

other to minimize the loop area.

6) Avoid long traces between the REG/DREG bypass

capacitors, driver output of the MAX5950, MOSFET

gates, and PGND. Minimize the loop formed by the

REG bypass capacitors, bootstrap diode, bootstrap

capacitor, the MAX5950, and upper MOSFET gate.

7) Place the bank of output capacitors close to the

load.

8) Distribute the power components evenly across the

board for proper heat dissipation.

9) Provide enough copper area at and around the

switching MOSFETs and the inductor to aid in ther-

mal dissipation.

10)Use 2oz copper to keep the trace inductance and

resistance to a minimum. Thin copper PC boards

can compromise efficiency since high currents are

involved in the application. Also, thicker copper

conducts heat more effectively, thereby reducing

thermal impedance.

HOT-SWAP CONTROLLER

THERMAL

SHUTDOWN

1.220V

AGND

MPWRGD

PWREN

CHARGE

PUMP

0.6V

PWRFLT

GATE

PWM_IN

HSENSE

SET DOMINANT

IOUT

PGI

DCENO

165ms RISING-

EDGE DELAY

FILTER

10礎

HUVLO

REG

165ms RISING

EDGE DELAY

FILTER

10ms RISING-

EDGE DELAY

FILTER

MAX5950

Simplified Block Diagrams

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